HDI PCBs use dense interconnections to solve routing and packaging constraints. Start with the design decision, then define the stackup, manufacturing evidence and RFQ. This hub connects 39 focused guides without treating a generic minimum feature size as a factory capability.
Start with the decision that is blocking your project
| Current question | Start here |
|---|---|
| Do we need HDI? | HDI vs standard PCB construction |
| Which layers must connect? | HDI PCB stackup selection |
| Can the package escape? | Fine-pitch BGA fanout with microvias |
| What evidence should we request? | Microvia reliability and thermal exposure |
| How do we compare quotations? | HDI PCB cost drivers |
What the architecture does and does not tell you
A build-up notation describes a general layer structure. It does not replace the layer drawing, via schedule, materials or acceptance plan. Follow each critical net through the complete connection path and preserve its reference arrangement. Compare the simplest constructions that meet the actual routing and product requirements.
The guides below separate geometry, processing, electrical behavior and purchasing decisions. Use them together when a proposed change crosses those boundaries. For example, a thinner dielectric can alter both microvia geometry and impedance; it should be approved as one coordinated stackup change.
Choose a construction
HDI vs standard PCB construction
Decide whether density justifies complexity.
HDI PCB stackup selection
Choose the interconnection structure.
1+N+1 HDI stackup
Single build-up layer pair.
2+N+2 HDI stackup design
Two build-up layer pairs.
Any-layer HDI and ELIC
Interconnect freedom and process tradeoffs.
HDI PCB design guidelines
Released design checks and fabricator review.
Define interconnections
PCB microvia design fundamentals
Microvia geometry and target pads.
Blind and buried PCB vias
Layer span and access comparison.
Via-in-pad filling and plating
Fill, cap and solder joint requirements.
Laser drilling for HDI PCBs
Hole formation and material interaction.
Stacked vs staggered microvias
Routing area and reliability tradeoffs.
Microvia aspect ratio design tradeoffs
Depth, diameter and process limits; link to calculator.
Microvia capture pads and registration
Land size and manufacturing tolerance.
Plan fabrication and assembly
HDI PCB manufacturing requirements
Fabrication process, RFQ scope and evidence.
Sequential lamination in HDI fabrication
Press cycles and process sequence.
HDI PCB materials selection
Laminate properties and process compatibility.
mSAP PCB fabrication
Modified semi-additive copper processing.
Copper-filled microvia processing
Fill quality and interface requirements.
Surface finish for fine-pitch HDI assembly
Solderability and assembly-process compatibility.
HDI PCB assembly planning
Printing, reflow and hidden-joint inspection.
HDI PCB prototype validation
Learning goals, coupons and revision control.
Rigid-flex HDI design planning
Rigid-to-flex transitions and interconnects.
Verify the design
Fine-pitch BGA fanout with microvias
Escape routing and plane reference.
Impedance control in HDI stackups
Finished geometry, Dk and coupon verification.
Signal integrity in HDI interconnects
Return paths, transitions and discontinuities.
Thermal planning for dense HDI boards
Copper distribution and heat transfer.
Microvia reliability and thermal exposure
Performance evidence and latent defects.
HDI microsection and performance testing
Coverage and limits of destructive inspection.
HDI DFM release checklist
A concrete release checklist, distinct from design tutorial.
IPC-2226 status and HDI design requirements
Historical design reference; no longer maintained.
IPC-6016 replacement and procurement notes
Superseded specification and current project requirements.
Apply and source
HDI requirements for medical electronics
Traceability, product risk and verification.
HDI requirements for automotive electronics
Thermal exposure, lifetime and change control.
HDI requirements for industrial electronics
Lifecycle, environment and repair access.
HDI planning for telecom and 5G
High-speed interconnects, RF and thermal needs.
HDI planning for wearable devices
Size, battery life and mechanical constraints.
HDI planning for aerospace electronics
Program-specific qualification and traceability.
HDI PCB cost drivers
Cost drivers, yield and scope comparison.
How to evaluate an HDI PCB manufacturer
Evidence, process fit and purchasing comparison.
Additional working guides
- SAP vs mSAP for flexible circuits
- Microvia-specific cost tradeoffs
- HDI design review workshop agenda
Use tools to prepare the discussion
Sketch a stackup, check a microvia ratio or explore fabrication cost inputs. These browser tools expose their assumptions. They provide planning estimates, not a supplier approval or a validated price.
Prepare a controlled HDI RFQ
Provide fabrication data, layer order, via spans, proposed materials, board dimensions, quantity breaks and the acceptance evidence your product needs. Identify unresolved design questions and ask the supplier to mark every assumption or exception. Keep the approved construction with the released revision so repeat orders can be evaluated against the same baseline.
Verified company capabilities
Supported build-up levels, minimum geometry, materials, certifications, equipment, lead times and MOQ: [NEEDS CLIENT INPUT]. The educational examples in this hub are not representations of factory capability.