An HDI PCB stackup defines copper layers, dielectric layers and the connections between them. Layer count alone cannot describe it. Two ten-layer boards can have very different fabrication routes, escape-routing capacity and inspection needs because their via spans and build-up structures differ.
Choose from the interconnection requirement
Begin with the densest device and a realistic escape-routing trial. Mark the nets that must leave each row, the reference planes they need and the layers that can carry them. Then check whether conventional through vias, one build-up pair or two build-up pairs provide enough useful channels. Adding layers without checking accessibility can produce more copper without solving the bottleneck.
The notation 1+N+1 generally describes one build-up layer on each side of an N-layer core structure; 2+N+2 describes two on each side. The notation does not, by itself, specify material thicknesses, every via span or the exact press sequence. Those belong in an approved drawing.
Compare candidate constructions
| Candidate | Decision to test before selection |
|---|---|
| Conventional multilayer | Can the required signals escape without unacceptable congestion or stubs? |
| 1+N+1 | Does one surface-to-inner transition provide enough routing access? |
| 2+N+2 | Does the second build-up stage solve a demonstrated layer-access problem? |
| Any-layer HDI | Is the additional interconnect freedom needed across the design and supported by a qualified process? |
Balance routing and reference planes
Do not allocate every newly accessible layer to signal routing. High-speed nets also need an intentional return-current path. A layer that looks empty in the routing view may be doing essential work as a reference plane. Moving a signal to another layer can require a reference transition, changes to coupling and another review of the channel.
Treat dielectric thickness and trace geometry as a pair. A provisional narrow trace may be convenient under a package but unsuitable as the geometry for the entire channel. Ask for the fabricator's proposed finished values and allowed adjustments before final impedance modeling.
A useful selection record
For an illustrative eight-layer design, compare a 1+6+1 proposal with an alternative construction using the same device placement and interface requirements. Record the routes that fail in each option, the plane interruptions introduced, and the manufacturing exceptions required. Select the simplest option that actually satisfies the design, not the option with the most impressive label.
Retain that comparison in the design history. It gives purchasing a concrete basis for evaluating a proposed substitute and prevents a later quotation from silently changing the interconnect architecture. Use the stackup planner for discussion drawings; its visualization is not a fabrication approval or a statement of available company capability.
Continue the engineering review
Open the related planning tool. Review its assumptions before using an estimate in a design decision.
Review your HDI requirements
Share the board revision, proposed stackup, quantity and open questions. Include the requirements discussed in this guide so the project review starts with the same assumptions.